Module bcm2711_pac::aux::AUX_MU_IIR_REG

source · [−]

Modules

INT_PENDING

Interrupt pending

RX_INT_PENDING_FIFO_CLEAR

RX interrupt ID bit (write), FIFO clear (read)

TX_INT_PENDING_FIFO_CLEAR

TX interrupt ID bit (read), FIFO clear (write)

Structs

Register

Constants

INT_PENDING
RX_INT_PENDING_FIFO_CLEAR
TX_INT_PENDING_FIFO_CLEAR