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In bcm2711_pac::aux::AUX_SPI_CNTL0_REG
In bcm2711_pac::aux::AUX_SPI_CNTL0_REG
Modules
CLEAR_FIFO
CLK_POLARITY
CS
DOUT_HOLD_TIME
ENABLE
IN_EDGE
OUT_EDGE
POST_INPUT
SHIFT_LEN
SHIFT_OUT_DIR
SPEED
VARIABLE_CS
VARIABLE_WIDTH
Structs
Register
Constants
CLEAR_FIFO
CLK_POLARITY
CS
DOUT_HOLD_TIME
ENABLE
IN_EDGE
OUT_EDGE
POST_INPUT
SHIFT_LEN
SHIFT_OUT_DIR
SPEED
VARIABLE_CS
VARIABLE_WIDTH
?
Constant
bcm2711_pac
::
aux
::
AUX_SPI_CNTL0_REG
::
VARIABLE_WIDTH
source
·
[
−
]
pub const VARIABLE_WIDTH:
Field
<
u32
,
Register
>;